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| technical note for brush motors h-bridge drivers (36v max.) bd6230, bd6231, bd6232, bd6235, bd6236, bd6237 z overview these h-bridge drivers are full bridge drivers for brush motor applications. each ic can operate at a wide range of power-supply voltages (from 3v to 36v), supporting output cu rrents of up to 2a. mos transistors in the output stage allow for pwm signal control, while the integrated vref voltage control function of previous models offers direct replacement of deprecated motor driver ics. these highly efficient h-bridge driver ics facilitate low-power consumption design. z features 1) built-in, selectable one channel or two channels configuration 2) low standby current 3) supports pwm control signal input (20khz to 100khz) 4) vref voltage setting pin enables pwm duty control 5) cross-conduction prevention circuit 6) four protection circuits provided: ocp, ovp, tsd and uvlo z applications vcr; cd/dvd players; audio-visual equipment; optical disc drives; pc peripherals; car audios; car navigation systems; oa equipments z line up matrix maximum output current rating voltage channels 0.5a 1.0a 2.0a 1ch bd6210 hfp / f bd6211 hfp / f bd6212 hfp / fp 7v 2ch bd6215 fv / fp bd6216 fp / fm bd6217 fm 1ch bd6220 hfp / f bd6221 hfp / f bd6222 hfp / fp 18v 2ch bd6225 fv / fp bd6226 fp / fm bd6227 fm 1ch bd6230 hfp / f bd6231 hfp / f bd6232 hfp / fp 36v 2ch bd6235 fv / fp bd6236 fp / fm bd6237 fm * packages; f:sop8, fv: ssopb24, hfp:hrp7, fp:hsop25, fm:hsopm28 aug.2007
2/16 z absolute maximum ratings (ta=25c) parameter symbol ratings unit supply voltage vcc 36 v output current i omax 0.5 * 1 / 1.0 * 2 / 2.0 * 3 a all other input pins v in -0.3 ~ vcc v operating temperature t opr -40 ~ +85 c storage temperature t stg -55 ~ +150 c power dissipation pd 0.687 * 4 / 0.98 * 5 / 1.4 * 6 / 1.45 * 7 / 2.2 * 8 w junction temperature tjmax 150 c *** notes: all voltages are with respect to ground. *1 bd6230 / bd6235. do not, exceed pd or aso. *2 bd6231 / bd6236. do not, exceed pd or aso. *3 bd6232 / bd6237. do not, exceed pd or aso. *4 sop8 package. mounted on a 70mm x 70mm x 1.6mm fr4 glass-epoxy board with less than 3% copper foil. derated at 5.5mw/c abo ve 25c. *5 ssopb24 package. mounted on a 70mm x 70mm x 1.6mm fr4 glass-epoxy board with less than 3% copper foil. derated at 7.8mw/c above 25c. *6 hrp7 package. mounted on a 70mm x 70mm x 1.6mm fr4 glass-epoxy board with less than 3% copper foil. derated at 11.2mw/c ab ove 25c. *7 hsop25 package. mounted on a 70mm x 70mm x 1.6mm fr4 glass-epoxy board with less than 3% copper foil. derated at 11.6mw/c above 25c. *8 hsopm28 package. mounted on a 70mm x 70mm x 1.6mm fr4 glass-epoxy board with less than 3% copper foil. derated at 17.6mw/c above 25c. z operating conditions (ta=25c) parameter symbol conditions unit supply voltage vcc 6 ~ 32 v vref voltage vref 3 ~ 32 v z electrical characteristics (unless otherwise specified, ta=25c and vcc=vref=24v) limits parameter symbol min. typ. max. unit conditions supply current (1ch) i cc 0.8 1.3 2.5 ma forward / reverse / brake supply current (2ch) i cc 1.3 2.0 3.5 ma forward / reverse / brake stand-by current i stby - 0 10 a stand-by input high voltage v ih 2.0 - - v input low voltage v il - - 0.8 v input bias current i ih 30 50 100 a v in =5.0v output on resistance * 1 r on 1.0 1.5 2.5 ? i o =0.25a, vertically total output on resistance * 2 r on 1.0 1.5 2.5 ? i o =0.5a, vertically total output on resistance * 3 r on 0.5 1.0 1.5 ? i o =1.0a, vertically total vref bias current i vref -10 0 10 a vref=vcc carrier frequency f pwm 20 25 35 khz vref=18v input frequency range f max 20 - 100 khz fin / rin *1 bd6230 / bd6235 *2 bd6231 / bd6236 *3 bd6232 / bd6237 3/16 z electrical characteristic curves (reference data) fig.1 supply current (1ch) fig.2 stand-by current fig.3 input threshold voltage fig.4 input bias current fig.5 vref input bias current fig.6 vref - duty (vcc=24v) fig.7 vcc - carrier frequency fig.8 under voltage lock out fig.9 over voltage protection fig.10 thermal shutdown fig.11 over current protection (h side) fig.12 over current protection (l side) 0.5 1.0 1.5 2.0 61218243036 supply voltage: vcc [v] circuit current: icc [ma] 85c 25c -40c 10 20 30 40 6 1218243036 supply voltage: v cc [v] oscillation frequency: f pwm [khz] 85c 25c -40c 0 2 4 6 8 6 1218243036 supply voltage: vcc [v] stand-by current: i stby [ p a] -40c 25c 85c 0 3 6 9 4.5 5 5.5 6 supply voltage: v cc [v] internal signal: release [v] 85c 25c -40c -0.5 0.0 0.5 1.0 1.5 0.8 1.2 1.6 2 input voltage: v in [v] internal logic: h/l [-] -40c 25c 85c -40c 25c 85c 0.0 0.2 0.4 0.6 0.8 1.0 0 0.2 0.4 0.6 0.8 1 input voltage: v ref / v cc [v] switching duty: d [ton/t] -40c 25c 85c 0 12 24 36 48 36 40 44 48 supply voltage: v cc [v] internal signal: release [v] 85c 25c -40c 0.0 0.2 0.4 0.6 0.8 1.0 0 6 12 18 24 30 36 input voltage: v in [v] input bias current: i ih [ma] 85c 25c -40c -10 -5 0 5 10 0 6 12 18 24 30 36 input voltage: v ref [v] input bias current: i vref [ p a] 85c 25c -40c -0.5 0.0 0.5 1.0 1.5 22.5 33.54 load current / iomax: normalized internal logic: h/l [-] 85c 25c -40c -0.5 0.0 0.5 1.0 1.5 125 150 175 200 junction temperature: t j [c] internal logic: h/l [-] -0.5 0.0 0.5 1.0 1.5 1 1.25 1.5 1.75 2 load current / iomax: normalized internal logic: h/l [-] 85c 25c -40c 4/16 z electrical characteristic curves (reference data) ? continued fig.13 output high voltage (0.5a class) fig.14 output high voltage (1a class) fig.15 output high voltage (2a class) fig.16 high side body diode (0.5a class) fig.17high side body diode (1a class) fig.18 high side body diode (2a class) fig.19 output low voltage (0.5a class) fig.20 output low voltage (1a class) fig.21 output low voltage (2a class) fig.22 low side body diode (0.5a class) fig.23 low side body diode (1a class) fig.24 low side body diode (2a class) 0 0.4 0.8 1.2 1.6 0 0.2 0.4 0.6 0.8 1 output current: i out [a] output voltage: v cc -v out [v] 85c 25c -40c 0 0.5 1 1.5 2 0 0.2 0.4 0.6 0.8 1 output current: i out [a] output voltage: v out [v] -40c 25c 85c 0 0.4 0.8 1.2 1.6 0 0.2 0.4 0.6 0.8 1 output current: i out [a] output voltage: v out [v] 85c 25c -40c 0 0.5 1 1.5 2 0 0.2 0.4 0.6 0.8 1 output current: i out [a] output voltage:v cc- v out [v] -40c 25c 85c 0 0.2 0.4 0.6 0.8 0 0.1 0.2 0.3 0.4 0.5 output current: i out [a] output voltage: v cc -v out [v] 85c 25c -40c 0 0.5 1 1.5 2 0 0.1 0.2 0.3 0.4 0.5 output current: i out [a] output voltage:v cc- v out [v] -40c 25c 85c 0 0.2 0.4 0.6 0.8 0 0.1 0.2 0.3 0.4 0.5 output current: i out [a] output voltage: v out [v] 85c 25c -40c 0 0.5 1 1.5 2 0 0.1 0.2 0.3 0.4 0.5 output current: i out [a] output voltage: v out [v] -40c 25c 85c 0 0.5 1 1.5 2 0 0.4 0.8 1.2 1.6 2 output current: i out [a] output voltage: v cc -v out [v] 85c 25c -40c 0 0.5 1 1.5 2 0 0.4 0.8 1.2 1.6 2 output current: i out [a] output voltage:v cc- v out [v] -40c 25c 85c 0 0.5 1 1.5 2 0 0.4 0.8 1.2 1.6 2 output current: i out [a] output voltage: v out [v] 85c 25c -40c 0 0.5 1 1.5 2 0 0.4 0.8 1.2 1.6 2 output current: i out [a] output voltage: v out [v] -40c 25c 85c 5/16 z block diagram and pin configuration bd6230f / bd6231f fig.25 bd6230f / bd6231f fig.26 sop8 bd6230hfp / bd6231hfp / bd6232hfp fig.27 bd6230/31/32hfp fig.28 hrp7 table 1 bd6230/31f pin name function 1 out1 driver output 2 vcc power supply 3 vcc power supply 4 fin control input (forward) 5 rin control input (reverse) 6 vref duty setting pin 7 out2 driver output 8 gnd ground table 2 bd6230/31/32hfp pin name function 1 vref duty setting pin 2 out1 driver output 3 fin control input (forward) 4 gnd ground 5 rin control input (reverse) 6 out2 driver output 7 vcc power supply fin gnd ground 3 :w 2 :w 7 :w 1 :w 4 :w 5 :w ctrl :w protect :w fin :w rin :w vcc :w vcc :w out1 :w out2 :w 8 :w gnd :w 6 :w vref :w duty :w out1 vcc vcc fin gnd out2 vref rin 7 :w 6 :w 2 :w 3 :w 5 :w ctrl :w protect :w fin :w rin :w vcc :w out1 :w out2 :w 4 :w gnd :w 1 :w vref :w duty :w fin :w gnd :w vref out1 fin gnd rin out2 vcc 6/16 z block diagram and pin configuration ? continued bd6232fp fig.29 bd6232fp fig.30 hsop25 bd6235fv fig. 31 bd6235fv fig. 32 ssopb24 table 3 bd6232fp pin name function 1,2 out1 driver output 6 gnd small signal ground 7,8 rnf power stage ground 12,13 out2 driver output 17 vref duty setting pin 19 rin control input (reverse) 20 fin control input (forward) 21 vcc power supply 22,23 vcc power supply fin gnd ground note: all pins not described above are nc pins. table 4 bd6235fv pin name function 1 out1a driver output 3 rnfa power stage ground 5 out2a driver output 7 gnd small signal ground 8 vrefa duty setting pin 9 rina control input (reverse) 10 fina control input (forward) 11 vcc power supply 12 vcc power supply 13 out1b driver output 15 rnfb power stage ground 17 out2b driver output 19 gnd small signal ground 20 vrefb duty setting pin 21 rinb control input (reverse) 22 finb control input (forward) 23 vcc power supply 24 vcc power supply note: all pins not described above are nc pins. 21 :w 22 :w 12 :w 1 :w 20 :w 19 :w ctrl :w protect :w fin :w rin :w vcc :w vcc :w out1 :w out2 :w 8 :w rnf :w 17 :w vref :w duty :w 6 :w gnd :w 2 :w 13 :w 7 :w 23 :w fin :w gnd :w 23 :w 24 :w 10 :w 9 :w ctrl :w protect :w fina :w rina :w vcc :w vcc :w 3 :w rnfa :w 8 :w vrefa :w duty :w 1 :w out1a :w 5 :w out2a :w 19 :w gnd :w 11 :w 12 :w 22 :w 21 :w ctrl :w protect :w finb :w rinb :w vcc :w vcc :w 15 :w rnfb :w 20 :w vrefb :w duty :w 13 :w out1b :w 17 :w out2b :w 7 :w gnd :w out1 out1 gnd nc nc nc gnd rnf rnf nc nc nc out2 out2 nc nc gnd vcc vcc vcc fin rin nc vref nc nc nc out1 a nc rnf a nc out2 a nc gnd vref a rin a fin a vcc vcc vcc vcc finb rinb vrefb gnd nc out2b nc rnfb nc out1b 7/16 z block diagram and pin configuration ? continued BD6235FP, bd6236fp/fm fig. 33 BD6235FP, bd6236fp fig. 34 hsop25 fig. 35 hsopm28 table 5 BD6235FP / bd6236fp pin name function 1 out1a driver output 3 rnfa power stage ground 6 out2a driver output 8 gnd small signal ground 9 vrefa duty setting pin 10 rina control input (reverse) 11 fina control input (forward) 12 vcc power supply 13 vcc power supply 14 out1b driver output 16 rnfb power stage ground 19 out2b driver output 20 gnd small signal ground 21 vrefb duty setting pin 22 rinb control input (reverse) 23 finb control input (forward) 24 vcc power supply 25 vcc power supply fin gnd ground note: all pins not described above are nc pins. table 6 bd6236fm pin name function 1 out1a driver output 3 rnfa power stage ground 6 out2a driver output 8 gnd small signal ground 9 vrefa duty setting pin 10 rina control input (reverse) 11 fina control input (forward) 12 vcc power supply 14 vcc power supply 15 out1b driver output 17 rnfb power stage ground 20 out2b driver output 22 gnd small signal ground 23 vrefb duty setting pin 24 rinb control input (reverse) 25 finb control input (forward) 26 vcc power supply 28 vcc power supply fin gnd ground note: all pins not described above are nc pins. 24 :w 25 :w 11 :w 10 :w ctrl :w protect :w fina :w rina :w vcc :w vcc :w 3 :w rnfa :w 9 :w vrefa :w duty :w 1 :w out1a :w 6 :w out2a :w 20 :w gnd :w 12 :w 13 :w 23 :w 22 :w ctrl :w protect :w finb :w rinb :w vcc :w vcc :w 16 :w rnfb :w 21 :w vrefb :w duty :w 14 :w out1b :w 19 :w out2b :w 8 :w gnd :w fin :w gnd :w out1 a nc gnd rnf a nc nc out2 a nc gnd vref a rin a fin a vcc vcc vcc vcc gnd finb rinb vrefb gnd out2b nc nc rnfb nc out1b out1 a nc gnd rnf a nc nc out2 a nc gnd vref a rin a fin a vcc nc vcc vcc nc gnd vcc finb rinb vrefb gnd nc out2b nc nc rnfb nc out1b 8/16 z block diagram and pin configuration ? continued bd6237fm fig. 36 bd6237fm fig. 37 hsopm28 table 7 bd6237fm pin name function 1,2 out1a driver output 3,4 rnf a power stage ground 6,7 out2a driver output 8 gnd small signal ground 9 vrefa duty setting pin 10 rina control input (reverse) 11 fina control input (forward) 12 vcc power supply 13,14 vcc power supply 15,16 out1b driver output 17,18 rnfb power stage ground 20,21 out2b driver output 22 gnd small signal ground 23 vrefb duty setting pin 24 rinb control input (reverse) 25 finb control input (forward) 26 vcc power supply 27,28 vcc power supply fin gnd ground note: all pins not described above are nc pins. 26 :w 28 :w 11 :w 10 :w ctrl :w protect :w fina :w rina :w vcc :w vcc :w 3 :w rnfa :w 9 :w vrefa :w duty :w 2 :w out1a :w 6 :w out2a :w 22 :w gnd :w 12 :w 14 :w 25 :w 24 :w ctrl :w protect :w finb :w rinb :w vcc :w vcc :w 17 :w rnfb :w 23 :w vrefb :w duty :w 16 :w out1b :w 20 :w out2b :w 8 :w gnd :w fin :w gnd :w 1 :w 7 :w 4 :w 27 :w 13 :w 15 :w 21 :w 18 :w out1 a out1 a gnd rnf a rnf a nc out2 a out2 a gnd vref a rin a fin a vcc vcc vcc vcc vcc gnd vcc finb rinb vrefb gnd out2b out2b nc rnfb rnfb out1b out1b 9/16 z functional descriptions 1) operation modes a) stand-by mode stand-by operates independently of the vref pin voltage. in stand-by mode, all internal circuits are turned off, including the output power transistors. motor output goes to high impedance. if the motor is running at the switch to stand-by mode, the system enters an idling state because of the body diodes. however, when the system switches to stand-by from any other mode (except the brake mode), the control logic remains in the high state for at least 50 s before shutting down all circuits. b) forward mode this operating mode is defined as the forward rotation of the motor when the out1 pin is high and out2 pin is low. when the motor is connected between the out1 and out2 pins, the current flows from out1 to out2. for operation in this mode, connect the vref pin with vcc pin. c) reverse mode this operating mode is defined as the reverse rotation of the motor when the out1 pin is low and out2 pin is high. when the motor is connected between the out1 and out2 pins, the current flows from out2 to out1. for operation in this mode, connect the vref pin with vcc pin. d) brake mode this operating mode is used to quickly stop the motor (sho rt circuit brake). it differs from the stand-by mode because the internal control circuit is operating in the brake mode. please switch to the stand-by mode (rather than the brake mode) to save power and reduce consumption. a) stand-by mode b) forward mode c) reverse mode d) brake mode fig.38 four basic operations (output stage) table 8 logic table fin rin vref out1 out2 operation a l l x hi-z* hi-z* stand-by (idling) b h l vcc h l forward (out1 > out2) c l h vcc l h reverse (out1 < out2) d h h x l l brake (stop) e pwm l vcc h pwm &&&&&&&& forward (pwm control) f l pwm vcc pwm &&&&&&&& h reverse (pwm control) g h l option h pwm &&&&&&&& forward (vref control) h l h option pwm &&&&&&&& h reverse (vref control) * hi-z is the off state of all output transistors. please note t hat this is the state of the connected diodes, which differs fr om that of the mechanical relay. x : don?t care m :w on :w off :w off :w on :w m :w off :w on :w on :w off :w m :w off :w on :w off :w on :w off :w off :w off :w off :w m :w 10/16 e) f) pwm control mode the rotational speed of the motor can be controlled by the switching duty when the pwm signal is input to the fin pin or the rin pin. in this mode, the high side output is fixed and the low side output does the switching, corresponding to the input signal. the switching operates by the output state toggling between "l" and "hi-z". the pwm frequency can be input in the range between 20khz and 100khz. note that control may not be attained by switching on duty at frequencies lower than 20khz, since the operation functions via the stand-by mode. also, circuit operation may not respond correctly when the input signal is higher than 100khz. to operate in this mode, connect the vref pin with vcc pin. in addition, establish a current path for the recovery current from the motor, by connecting a bypass capacitor (10 f or more is recommended) between vcc and ground. control input : h control input : l fig.39 pwm control operation (output stage) fig.40 pwm control operation (timing chart) g) h) vref control mode the built-in vref-switching on duty conversion circuit provides switching duty corresponding to the voltage of the vref pin and the vcc voltage. the function offers the same level of control as the high voltage output setting function in previous models. the on duty is shown by the following equation. duty vref [v] / vcc [v] for example, if vcc voltage is 24v and vref pin voltage is 18v, the switching on duty is about 75 percent. however, please note that the switching on duty might be limited by the range of vref pin voltage (refer to the operating conditions, shown on page 2). the pwm carrier frequency in this mode is 25khz (nominal), and the switching operation is the same as it is the pwm control modes. when operating in this mode, do not input the pwm signal to the fin and rin pins. in addition, establish a current path for the recovery current from the motor, by connecting a bypass capacitor (10 f or more is recommended) between vcc and ground. fig.41 vref control operation (timing chart) m :w on :w off :w off :w on :w m :w on :w off :w off :w off :w vcc :w vref :w fin :w rin :w out1 :w out2 :w 0 :w fin :w rin :w out1 :w out2 :w 11/16 2) cross-conduction protection circuit in the full bridge output stage, when the upper and lower transistors are turned on at the same time, and this condition exists during the period of transition from high to low, or low to high, a rush current flows from the power supply to ground, resulting in a loss. this circuit protects against the rush current by providing a dead time (about 400ns, nominal) at the transition. 3) output protection circuits a) under voltage lock out (uvlo) circuit to secure the lowest power supply voltage necessary to operate the controller, and to prevent under voltage malfunctions, a uvlo circuit has been built into this driver. when the power supply voltage falls to 5.0v (nominal) or below, the controller forces all driver outputs to high impedance. when the voltage rises to 5.5v (nominal) or above, the uvlo circuit ends the lockout operation and returns the chip to normal operation. b) over voltage protection (ovp) circuit when the power supply voltage exceeds 47v (nominal), the controller forces all driver outputs to high impedance. the ovp circuit is released and its operation ends when the voltage drops back to 43v (nominal) or below. this protection circuit does not work in the stand-by mode. also, note that this circuit is supplementary, and thus if it is asserted, the absolute maximum rating will have been exce eded. therefore, do not continue to use the ic after this circuit is activated, and do not operate the ic in an environment where activation of the circuit is assumed. c) thermal shutdown (tsd) circuit the tsd circuit operates when the junction temperature of the driver exceeds the preset temperature (175c nominal). at this time, the controller forces all driver outputs to high impedance. since thermal hysteresis is provided in the tsd circuit, the chip returns to normal operation when the junction temperature falls below the preset temperature (150c nominal). thus, it is a self-returning type circuit. the tsd circuit is designed only to shut the ic off to prev ent thermal runaway. it is not designed to protect the ic or guarantee its operation in the presence of extreme heat. do not continue to use the ic after the tsd circuit is activated, and do not operate the ic in an environment where activation of the circuit is assumed. d) over current protection (ocp) circuit to protect this driver ic from ground faults, power supply line faults and load short circuits, the ocp circuit monitors the output current for the circuit?s monitoring time (10 s, nominal). when the protection circuit detects an over current, the controller forces all driver outputs to high impedance during the off time (290 s, nominal). the ic returns to normal operation after the off time period has elapsed (self-returning type). at the two channels type, this circuit works independently for each channel. fig.42 over current protection (timing chart) threshold :w iout :w ctrl input :w internal status :w monitor / timer :w 0 :w off :w on :w mon. :w off timer :w on :w 12/16 z thermal design fig.43 thermal derating curve fig.44 thermal derating curve fig.45 thermal derating curve (sop8) (ssopb24) (hrp7) fig.46 thermal derating curve fig.47 thermal derating curve (hsop25) (hsopm28) thermal design needs to meet the following operating conditions. in creating the thermal design, sufficient margin must be provided to guarantee the temperature conditions below. 1. the ambient temperature ta must be 85c or below 2. the junction temperature tj must be 150c or below the junction temperature tj can be determined using the following equation. tj ta + t j-a x pc [c] the power consumption pc can be determined using the following equation. refer to page 4 about v on(h) and v f(h) . pc (i out 2 x r on ) x (v ref / v cc ) + i out x (v on(h) + v f(h) ) x (1 - v ref / v cc ) + v cc x i cc [w] example using the bd6232fp conditions: ta=50c, vcc=vref=24v, iout=0.5a. the power consumption of the ic and the junction temperature are as follows: pc 0.5 2 x 1.0 + 24 x 1.3m = 281mw tj 50 + 86.2 x 281m = 74 [c] where the tjmax parameter is 150c and the derating is set to 80 percents, the maximum ambient temperature tamax is determined as follows. ta ? tjmax x 0.8 - t j-a x pc 96 [c] in this example, thermal design can be considered satisfactory (meaning that there are no problems in thermal design), since the system meets the operating temperature conditions. table 9 thermal resistance package t j-a [c/w] sop8 182 ssopb24 122 hrp7 89.3 hsop25 86.2 hsop28 56.8 mounted on a 70mmx70mmx1.6mm fr4 glass-epoxy board with less than 3% copper foil. 0.0 0.5 1.0 1.5 0 25 50 75 100 125 150 ambient temperature [c] pd [w] i) 0.562w ii) 0.687w i) package only ii) mounted on rohm standard pcb (70mm x 70mm x 1.6mm fr4 glass-epoxy board) 0.0 2.0 4.0 6.0 8.0 10.0 0 25 50 75 100 125 150 ambient temperature [c] pd [w] i) package only (copper foil: 10.5mm x 10.5mm) ii) 2 layers pcb (copper foil: 15mm x 15mm) iii) 2 lay ers pc b (c opper foil: :70mm x 70mm) iv) 4 layers pcb (copper foil: 70mm x 70mm) i) 1.4w ii) 2.3w iii) 5.5w iv) 7.3w 0 1 2 3 0 25 50 75 100 125 150 ambient temperature [c] pd [w] i) 0.85w ii) 1.45w i) package only ii) mounted on rohm standard pcb (70mm x 70mm x 1.6mm fr4 glass-epoxy board) 0 1 2 3 0 25 50 75 100 125 150 ambient temperature [c] pd [w] i) 1.80w ii) 2.20w i) package only ii) mounted on rohm standard pcb (70mm x 70mm x 1.6mm fr4 glass-epoxy board) 0.0 0.5 1.0 1.5 0255075100125150 ambient temperature [c] pd [w] i) 0.787w ii) 0.976w i) package only ii) mounted on rohm standard pcb (70mm x 70mm x 1.6mm fr4 glass-epoxy board) 13/16 z interfaces fig.48 fin / rin fig.49 vref fig.50 out1 / out2 fig.51 out1 / out2 (sop8/hrp7) (ssopb24/hsop25/hsopm28) z notes for use 1) absolute maximum ratings devices may be destroyed when supply voltage or operating temperature exceeds the absolute maximum rating. because the cause of this damage cannot be identified as, for example, a short circuit or an open circuit, it is important to consider circuit protection measures ? such as adding fuses ? if any value in excess of absolute maximum ratings is to be implemented. 2) connecting the power supply connector backward connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply lines, such as adding an external direction diode. 3) power supply lines return current generated by the motor?s back-emf requires countermeasures, such as providing a return current path by inserting capacitors across the power supply and gnd. in th is case, it is important to conclusively confirm that none of the negative effects sometimes seen with electrolytic capacitors ? including a capacitance drop at low temperatures - occurs. also, the connected power supply must have sufficient current absorbing capability. otherwise, the regenerated current will increase voltage on the power supply line, which may in turn cause problems with the product, including peripheral circuits exceeding the absolute maximum rating. to help protect against damage or degradation, physical safety measures should be taken, such as providing a voltage clamping diode across the power supply and gnd. 4) electrical potential at gnd keep the gnd terminal potential to the minimum potential under any operating condition. in addition, check to determine whether there is any terminal that provides voltage below gnd, including the voltage during transient phenomena. when both a small signal gnd and high current gnd are present, single-point grounding (at the set?s reference point) is recommended, in order to separate the small signal and high current gnd, and to ensure that voltage changes due to the wiring resistance and high current do not affect the voltage at the small signal gnd. in the same way, care must be taken to avoid changes in the gnd wire pattern in any external connected component. 5) thermal design use a thermal design that allows for a sufficient margin in light of the power dissipation (pd) under actual operating conditions. 6) inter-pin shorts and mounting errors use caution when positioning the ic for mounting on printed circuit boards. the ic may be damaged if there is any connection error, or if pins are shorted together. 7) operation in strong electromagnetic fields using this product in strong electromagnetic fields may cause ic malfunctions. use extreme caution with electromagnetic fields. fin :w vcc :w rin :w 100k :w 100k :w vref :w vcc :w 10k :w out1 :w out2 :w vcc :w gnd :w vcc :w out1 :w out2 :w rnf :w gnd :w 14/16 8) aso - area of safety operation when using the ic, set the output transistor so that it does not exceed absolute maximum ratings or aso. 9) built-in thermal shutdown (tsd) circuit the tsd circuit is designed only to shut the ic off to prevent thermal runaway. it is not designed to protect the ic or guarantee its operation in the presence of extreme heat. do not continue to use the ic after the tsd circuit is activated, and do not operate the ic in an environment where activation of the circuit is assumed. 10) capacitor between output and gnd in the event a large capacitor is connected between the outp ut and gnd, if vcc and vin are short-circuited with 0v or gnd for any reason, the current charged in the capacitor f lows into the output and may destroy the ic. use a capacitor smaller than 1 f between output and gnd. 11) testing on application boards when testing the ic on an application board, connecting a capacitor to a low impedance pin subjects the ic to stress. therefore, always discharge capacitors after each process or step. always turn the ic's power supply off before connecting it to or removing it from the test setup du ring the inspection process. ground the ic during assembly steps as an antistatic measure. use similar precaution when transporting or storing the ic. 12) switching noise when the operation mode is in pwm control or vref control, pwm switching noise may effects to the control input pins and cause ic malfunctions. in this case, insert a pulled down resistor (10k ? is recommended) between each control input pin and ground. 13) regarding the input pin of the ic this monolithic ic contains p+ isolation and p substrate layers between adjacent elements, in order to keep them isolated. p-n junctions are formed at the intersection of these p layers with the n layers of other elements, creating a parasitic diode or transistor. for example, the relation between each potential is as follows: when gnd > pin a and gnd > pin b, the p-n junction operates as a parasitic diode. when gnd > pin b, the p-n junction operates as a parasitic transistor. parasitic diodes inevitably occur in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits, as well as operating malfunctions and physical damage. therefore, do not use methods by which parasitic diodes operate, such as applying a voltage lower than the gnd (p substrate) voltage to an input pin. z ordering part number b d 6 2 x x - rohm part number type 1x: 7v max. 2x: 18v max. 3x: 36v max. x0: 1ch/ 0.5a x5: 2ch/ 0.5a x1: 1ch/1a x6: 2ch/1a x2: 1ch/2a x7: 2ch/2a package f: sop8 fv: ssopb24 fp: hsop25 fm: hsopm28 hfp: hrp7 packaging spec. e2: embossed taping (sop8/ssopb24 /hsop25/hsopm28) tr: embossed taping (hrp7) resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a p aras iti c element pin b other adjacent elements e b c gnd p aras iti c element a pp endix: exam p le of monolithic ic structure 15/16 * when you order , please order in times the amount of package quantity. tape quantit y direction of feed embossed carrier tape 2500pcs (the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand) ! catalog no.05n000a '05.4 rohm c 3000 tsu notes no technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of rohm co.,ltd. the contents described herein are subject to change without notice. the specifications for the product described in this document are for reference only. upon actual use, therefore, please request that specifications to be separately delivered. application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. rohm co.,ltd. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by rohm co., ltd. is granted to any such buyer. products listed in this document are no antiradiation design. appendix1-rev2.0 thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact your nearest sales office. rohm customer support system the americas / eupope / asia / japan contact us : webmaster@ rohm.co. jp www.rohm.com copyright ? 2007 rohm co.,ltd. the products listed in this document are designed to be used with ordinary electronic equipment or de vices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of which would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. it is our top priority to supply products with the utmost quality and reliability. however, there is always a chance of failure due to unexpected factors. therefore, please take into account the derating characteristics and allow for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in order to prevent possible accidents that may result in bodily harm or fire caused by component failure. rohm cannot be held responsible for any damages arising from the use of the products under conditions out of the range of the specifications or due to non-compliance with the notes specified in this catalog. 21, saiin mizosaki- cho, ukyo-ku, kyoto 615-8585, japan tel : +81-75-311-2121 fax : +81-75-315-0172 appendix |
Price & Availability of BD6235FP
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